SRAM (static random access memory) devices are commonly utilized for static memory storage. As semiconductors move into deep sub-micron technologies there is constant demand for denser memories that also demand low power. Since the minimum voltage for a reliable operation of an SRAM cell voltage is not scaling as fast as the logic, modern SRAMs are now operating with dual power supplies. One power supply VDD (e.g., 0.8 volts) is used to power the SRAM periphery, while another power supply VCS (1.4 volts) is used to power up the memory array including the memory cells. Since the differential between these two power domains is growing, voltage level shifters are needed to accommodate the growing VDD/VCS skew.
Previous level shifters (both dynamic and static) either cannot satisfy the two directional voltage skew, add significant delay to perform the voltage level translation, or require a large area to implement this function.